Team

Per Stenström is a professor of computer engineering at Chalmers University of Technology. His research interests are in computer architecture. He has authored or co-authored four textbooks and about 200 publications and 20 patents in this area. He is known for his many contributions to high-performance memory systems which has awarded him a Fellow of the ACM and the IEEE. He has extensive experience in scientific publishing as editor-in-chief and program chair of prestigious scientific journals and conferences. Apart from acting as the associate editor-in-chief of JPDC in the architecture area, he acts as senior associate editor of ACM TACO and topical editor of IEEE Transactions on Computers. He has been program chair or co-chair of the IEEE/ACM Symposium on Computer Architecture, the IEEE High-Performance Computer Architecture Symposium, the IEEE Parallel and Distributed Processing Symposium and ACM International Conference on Supercomputing. He is a member of the Royal Swedish Academy of Engineering Sciences, Academia Europaea and the Royal Spanish Academy of Engineering Science.

Miquel Pericàs is an associate professor of computer architecture since 2019. His research interests cover high performance computing, parallel runtime systems, memory systems and manycore architectures. He has published over 50 papers on these topics in international journals and conferences. Prior to joining Chalmers he worked at the Tokyo Institute of Technology, and before that at the Barcelona Supercomputing Center. He is the author of the XiTAO runtime system and several open source tools for the analysis of task-based programs. In the EPI and LEGaTO projects has researched runtime techniques for efficient resource usage and reduction of energy in the context of the LLVM OpenMP and the XiTAO runtimes. The overall goal of his research are techniques to design low-overhead runtimes and to reduce energy consumption while providing scalability, programmability and predictable execution. He is a member of the HiPEAC NoE, the IEEE Computer Society and ACM SIGARCH.

Ioannis Sourdis was born in Corfu, Greece, in 1979. He is a Professor in Computer Engineering at Chalmers University of Technology, Sweden. Sourdis has an engineering diploma Dipl-Eng (2002) and a MSc (2004) in ECE from TU Crete, Greece, and a PhD (2007) in computer engineering from TU Delft, The Netherlands. His research interests include architecture and design of high performance and embedded computer systems, reconfigurable computing, memory systems, and interconnection networks. Sourdis has co-authored one of the 25 most significant FPL papers that most strongly influenced theory and practice in the field of reconfigurable computing. He has participated in many national as well as European research projects and lead one of them (DeSyRe FP7 project). Sourdis is member of the HiPEAC NoE, member of IEEE and ACM.